1. Field of the Invention
The present invention relates generally to memory device testing and in particular to AC testability path for memory devices.
2. Background Information
AC testability is an important part of memory chip verification. Standard chip verification (or bring up) involves running various patterns on LBIST (Logic Built in Self Test) and ABIST (Array Built in Self Test) paths. Ideally, LBIST and ABIST paths should be mutually exclusive and have no interaction with each other. However, this is very rarely achieved in practice and in most cases LBIST paths are dependent on the timing and behavior of a memory array which is typically tested by ABIST.